rev. 1.0 november 2011 www.aosmd.com page 1 of 10 AOZ8001DI ultra-low capacitance tvs diode array general description the AOZ8001DI is a transient voltage suppressor array designed to protect high spee d data lines from esd and lightning. this device incorporates four surge rated, low capacitance steering diodes and a tvs in a single package. during transient conditions, the st eering diodes direct the transient to either the positive side of the power supply line or to ground. they may be used to meet the esd immunity requirements of iec 61000-4-2, level 4. the tvs diodes provide effective suppression of esd voltages: 15kv (air discharge) and 8kv (contact discharge). the AOZ8001DI comes in a rohs compliant dfn 1.6mm x 1.6mm package and is rated over a -40c to +85c ambient temperature range. it is compatible with both lead free and snpb assembly techniques. the very small 1.6mm x 1.6mm dfn package makes it ideal for applications where pcb space is a premium. the dfn has a flow through package design for an optimal and user friendly pcb layout design. the small size, low capacitance and high esd protection makes it ideal for protecting high speed video and data communication interfaces. features ? esd protection for high-speed data lines: ? iec 61000-4-2, level 4 (esd) immunity test ? 15kv (air discharge) and 8kv (contact discharge) ? iec 61000-4-5 (lightning) 5a (8/20s) ? human body model (hbm) 15kv ? small package saves board space ? low insertion loss ? protects four i/o lines ? low capacitance from io to ground: 1.0pf ? low clamping voltage ? low operating voltage: 5.0v ? pb-free device ? green product applications ? usb 2.0 power and data line protection ? video graphics cards ? monitors and flat panel displays ? digital video interface (dvi) ? 10/100/1000 ethernet ? notebook computers typical application figure 1. usb 2.0 high speed port usb controller +5v d+ d- gnd usb controller +5v d+ d- gnd AOZ8001DI 1 2 3 6 5 4
rev. 1.0 november 2011 www.aosmd.com page 2 of 10 AOZ8001DI ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. pin configuration absolute maximum ratings exceeding the absolute maximum ratings may damage the device. notes: 1. iec 61000-4-2 discharge with c discharge = 150pf, r discharge = 330?. 2. human body discharge per mil-std-883, method 3015 c discharge = 100pf, r discharge = 1.5k?. maximum operating ratings part number ambient temperature range package environmental AOZ8001DI -40c to +85c dfn 1.6 x 1.6 rohs compliant green product 1 2 3 6 5 4 ch1 vn nc nc vp ch2 dfn-6 (top view) parameter rating vp ? vn 6v peak pulse current (i pp ), t p = 8/20s 5a storage temperature (t s ) -65c to +150c esd rating per iec61000-4-2, contact (1) 8kv esd rating per iec61000-4-2, air (1) 15kv esd rating per human body model (2) 15kv parameter rating junction temperature (t j ) -40c to +125c
rev. 1.0 november 2011 www.aosmd.com page 3 of 10 AOZ8001DI electrical characteristics t a = 25c unless otherwise s pecified. specifications in bold indicate a temperature range of -40c to +85c. notes: 3. the working peak reverse voltage, v rwm , should be equal to or greater than the dc or continuous peak operating voltage level. 4. v br is measured at the pulse test current i t . 5. measurements performed with no external capacitor on v p (pin 5 floating). 6. measurements performed with v p biased to 3.3 volts (pin 5 @ 3.3v). 7. measurements performed using a 100ns transmission line pulse (tlp) system. symbol parameter conditions min. typ. max. units v rwm reverse working voltage between pin 5 and 2 (3) 5.5 v v br reverse breakdown volt- age i t = 1ma, between pins 5 and 2 (4) 6.6 v i r reverse leakage current v rwm = 5v, between pins 5 and 2 1.0 a v f diode forward voltage i f = 15ma 0.70 0.85 1 v v cl channel clamp voltage positive transients negative transient i pp = 1a, tp = 100ns, any i/o pin to ground (5)(7) 10.00 -2.00 v v channel clamp voltage positive transients negative transient i pp = 5a, tp = 100ns, any i/o pin to ground (5)(7) 11.00 -5.00 v v channel clamp voltage positive transients negative transient i pp = 12a, tp = 100ns, any i/o pin to ground (5)(7) 14.50 -10.50 v v c j junction capacitance v r = 0v, f = 1mhz, between i/o pins (6) 0.1 0.12 pf v r = 0v, f = 1mhz, any i/o pin to ground (6) 1.0 1.17 pf ? c j channel input capacitance matching v r = 0v, f = 1mhz, between i/o pins (5) 0.03 pf
rev. 1.0 november 2011 www.aosmd.com page 4 of 10 AOZ8001DI typical performance characteristics typical variation of c in vs v r (f = 1mhz, t = 25 c) 1.5 1.25 1.0 0.75 0.50 0.25 0 0 vp = 3.3v input voltage (v) input capacitance (pf) clamping voltage vs. peak pulse current (tperiod = 100ns, tr = 1ns) 15 14 13 12 11 10 9 peak pulse current, i pp (a) clamping voltage, v cl (v) forward voltage vs. forward current (tperiod = 100ns, tr = 1ns) 12 10 8 6 4 2 0 forward current (a) forward voltage (v) i/o ? gnd insertion loss (s21) vs. frequency (vp = 3.3v) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 frequency (mhz) insertion loss (db) 1 10 100 1000 100 10 1000 analog crosstalk (i/o?i/o) vs. frequency 20 0 -20 -40 -60 -80 frequency (mhz) insertion loss (db) esd response (8kv contact per iec61000-4-2) 12345 0 2 4 6 8 10 12 0 2 4 6 8 10 12
rev. 1.0 november 2011 www.aosmd.com page 5 of 10 AOZ8001DI connector d+ d- d+ d- protected ic flow through layout application information the AOZ8001DI tvs is design to protect two data lines from fast damaging transient ov er-voltage by clamping it to a reference. when the transient on a protected data line exceed the reference voltage the steering diode is forward bias thus, conducting the harmful esd transient away from the sensitive circuitry under protection. pcb layout guidelines printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. the location of the protection devices on the pcb is the simplest and most important design rule to follow. the AOZ8001DI devices should be located as close as possi- ble to the noise source. the placement of the AOZ8001DI devices should be used on all data and power lines that enter or exit the pcb at the i/o connec- tor. in most systems, surge pulses occur on data and power lines that enter the pcb through the i/o connector. placing the AOZ8001DI devices as close as possible to the noise source ensures th at a surge voltage will be clamped before the pulse can be coupled into adjacent pcb traces. in addition, the pcb should use the shortest possible traces. a short trace length equates to low impedance, which ensures that the surge energy will be dissipated by the AOZ8001DI device. long signal traces will act as antennas to receive energy from fields that are produced by the esd pulse. by keeping line lengths as short as possible, the efficiency of the line to act as an antenna for esd related fields is reduced. minimize inter- connecting line lengths by placing devices with the most interconnect as close together as possible. the protec- tion circuits should shunt the surge voltage to either the reference or chassis ground. shunting the surge voltage directly to the ic?s signal ground can cause ground bounce. the clamping performance of tvs diodes on a single ground pcb can be improved by minimizing the impedance with relatively short and wide ground traces. the pcb layout and ic package parasitic inductances can cause significant overshoot to the tvs? clamping voltage. the inductance of the pcb can be reduced by using short trace lengths an d multiple layers with separate ground and power planes. one effective method to minimize loop problems is to incorporate a ground plane in the pcb design. the AOZ8001DI ultra-low capacitance tvs is designed to protect four high speed data transmissi on lines from transient over-voltages by clamping them to a fixed reference. the low inductance and construction minimizes voltage overshoot during high current surges. when the voltage on the protected line exceeds the reference voltage the internal steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. good circuit board layout is critical for the suppression of esd induced transients. the following guidelines are recommended: 1. place the tvs near the io terminals or connectors to restrict transient coupling. 2. fill unused portions of the pcb with ground plane. 3. minimize the path length between the tvs and the protected line. 4. minimize all conductive loops including power and ground loops. 5. the esd transient return path to ground should be kept as short as possible. 6. never run critical signals near board edges. 7. use ground planes whenever possible. 8. avoid running critical signal traces (clocks, resets, etc.) near pcb edges. 9. separate chassis ground traces from components and signal traces by at least 4mm. 10. keep the chassis ground trace length-to-width ratio <5:1 to minimize inductance. 11. protect all external connections with tvs diodes.
rev. 1.0 november 2011 www.aosmd.com page 6 of 10 AOZ8001DI sim card port connection ieee1394 port connection sim AOZ8001DI AOZ8001DI vcc reset clock i/o gnd ieee 1394 phy ieee 1394 connector tpbiasx tpax+ tpax- tpbx+ tpbx- gnd AOZ8001DI AOZ8001DI
rev. 1.0 november 2011 www.aosmd.com page 7 of 10 AOZ8001DI 10/100 ethernet port connection ethernet controller rj45 connector trd0+ trd0- trd1+ trd1- trd2+ trd2- trd3- trd3+ AOZ8001DI AOZ8001DI AOZ8001DI AOZ8001DI
rev. 1.0 november 2011 www.aosmd.com page 8 of 10 AOZ8001DI package dimensions, dfn 1.6 x 1.6 e pin1id d b l e e1 1 6 a1 c a notes: 1. dimensions and tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. symbols a a1 b c d e e e1 l dimensions in millimeters side view top view bottom view min. 0.50 0.00 0.22 1.55 1.55 0.225 nom. 0.55 0.02 0.25 1.52 ref. 1.60 1.60 0.50 bsc 1.0 ref 0.275 max. 0.60 0.05 0.28 1.65 1.65 0.325 recommended land pattern unit: mm 0.45 1.25 0.50 0.30
rev. 1.0 november 2011 www.aosmd.com page 9 of 10 AOZ8001DI tape and reel dimens ions, dfn 1.6 x 1.6 carrier tape reel leader / trailer & orientation package dfn 1.6x1.6 a0 1.78 0.05 b0 1.78 0.05 k0 0.69 0.05 d0 ?1.50 0.10 d1 ?0.50 0.05 e 8.00 +0.30 / -0.10 e1 1.75 0.10 e2 3.50 0.05 p0 4.00 0.10 p1 4.00 0.10 p2 2.00 0.05 t 0.20 0.02 trailer tape 300mm min. components tape orientation in pocket leader tape 500mm min. p1 p0 unit: mm a0 b0 5 max. t k0 p2 e e2 e1 d0 d1 feeding direction tape size 8mm reel size ?178 m ?178.0 1.0 n ?60.0 1.0 r g unit: mm w 11.80 0.5 h ?13.0 +0.5 / ?0.2 w1 9.0 0.5 s 2.40 0.10 k 10.25 0.2 e ?9.8 r ? w1 m w n h sk
rev. 1.0 november 2011 www.aosmd.com page 10 of 10 AOZ8001DI part marking f AOZ8001DI (dfn 1.6 x 1.6) assembly lot code product number code week code as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. this datasheet contains preliminary data; supplementary data may be published at a later date. alpha & omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products ar e not authorized for use as critical components in life support devices or systems.
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